The Quantum Artificial Intelligence team at Google is launching a hardware initiative to design and build new quantum information processors based on superconducting electronics.
John Martinis and his team at UC Santa Barbara will join Google in this initiative. John and his group have made great strides in building superconducting quantum electronic components of very high fidelity. John was recently awarded the London Prize recognizing him for his pioneering advances in quantum control and quantum information processing.
Superconducting circuits at the surface code threshold for fault tolerance
John Martinis and his team published in the Journal Nature - Superconducting quantum circuits at the surface code threshold for fault tolerance
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The superconducting quantum circuit with five Xmon qubits (cross-shaped devices) placed in a linear array. The quantum device shows logic gates with fidelities at the surface code threshold for fault tolerance. (Photo credit: Erik Lucero.)
With an integrated hardware group the Quantum AI team will now be able to implement and test new designs for quantum optimization and inference processors based on recent theoretical insights as well as our learnings from the D-Wave quantum annealing architecture. We will continue to collaborate with D-Wave scientists and to experiment with the “Vesuvius” machine at NASA Ames which will be upgraded to a 1000 qubit “Washington” processor.
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John Martinis and his team at UC Santa Barbara will join Google in this initiative. John and his group have made great strides in building superconducting quantum electronic components of very high fidelity. John was recently awarded the London Prize recognizing him for his pioneering advances in quantum control and quantum information processing.
Superconducting circuits at the surface code threshold for fault tolerance
John Martinis and his team published in the Journal Nature - Superconducting quantum circuits at the surface code threshold for fault tolerance
The superconducting quantum circuit with five Xmon qubits (cross-shaped devices) placed in a linear array. The quantum device shows logic gates with fidelities at the surface code threshold for fault tolerance. (Photo credit: Erik Lucero.)
With an integrated hardware group the Quantum AI team will now be able to implement and test new designs for quantum optimization and inference processors based on recent theoretical insights as well as our learnings from the D-Wave quantum annealing architecture. We will continue to collaborate with D-Wave scientists and to experiment with the “Vesuvius” machine at NASA Ames which will be upgraded to a 1000 qubit “Washington” processor.
Read more »
